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MP3431 21a , high - efficiency , fully integrated , synchronous , boost converter w ith programmable input current limit MP3431 rev. 1. 0 www.monolithicpower.com 1 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. description the MP3431 is a 600khz , fixed - frequency, wide input range , highly integrated , boost converter. the MP3431 starts from an input voltage as low as 2. 7 v and supports up to 30w of load power from a 1 - cell battery with integrated low r ds( on ) power mosfet s . the MP3431 adopts constant - off - time (cot) control topology , which provid es fast transient response. mode supports the selection of pulse - skip mode (psm), forced continuous conduction mode (fccm) , and ultrasonic mode (usm) in light - load condition. the programmable in put current limit provides accurate over load protection . the low - side mosfet limits the cycle - by - cycle induct or peak current , and the high - side mosfet eliminates the need for an external schottky diode. full protection features include programmable input under - voltage lockout ( uvlo ) and over - temperature protection (otp) . the MP3431 is available in a qfn - 13 ( 3 mmx4mm) package. features ? 2.7v to 13 v start - up voltage ? 0.8v to 13v operation voltage ? up to 1 6 v output voltage ? support s 30w average power load and 40w peak power load from 3.3v ? programmable input current limit ? 21.5a internal switch current limit ? integrated 6.5 m and 10 m power mosfet ? > 9 5 % efficiency for 3 .6 v v in to 9 v/ 3a ? selectable psm, > 2 3 khz usm , and f ccm in light - load condition ? 600khz fixed switching frequency ? adaptive cot for fast transient response ? external soft start and compensation pin s ? programmable uvlo and hysteresis ? 150 c over - temperature protection (otp) ? av ailable in a qf n - 13 (3mmx4mm) package applications ? notebook s ? bluetooth speaker s ? portable pos system s ? quick charger power bank s all mps parts are lead - free, halogen - free, and adhere to the rohs directive. for mps green status, please visit the mps w ebsite under quality assurance. mps and the future of analog ic technology are registered trademarks of monolithic power systems, inc. typical application m p 3 4 3 1 s w b s t v i n v i n m o d e e n v d d s s c 1 2 2 f x 3 a g n d p g n d v o u t f b c o m p i l i m v o u t c 2 2 2 f x 3 r 1 7 5 0 k r 2 9 3 . 1 k c 6 6 . 8 n f r 3 6 . 8 k c 3 4 . 7 f c 4 2 2 n f c 5 0 . 1 f l 1 1 . 5 h o n / o f f h i g h / m i d d l e / l o w 9 v r 5 2 2 k c 7 4 . 7 n f r 4 1 k 50 55 60 65 70 75 80 85 90 95 100 1 10 100 1000 efficienc y ( %) load current (ma) efficiency vs. load current psm vin=3v vin=3.3v vin=3.6v vin=4.2v
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 2 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. ordering information part number* package top marking MP3431 gl qfn - 13 (3 mm x 4 mm ) see be lo w * for tape & reel, add suffix C z ( e.g . MP3431 gl C z) top marking mp: mps prefix y : year code w: week code 34 31 : first four digits of the part number l ll : lot number package reference top view qfn - 13 (3mmx4mm) 1 s w 8 v o u t 7 p g n d v d d s s c o m p f b e n v i n b s t m o d e 4 1 1 3 1 2 2 1 3 5 1 0 9 6 i l i m a g n d
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 3 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. absolute maximum rat ings (1) sw ................................ - 0.3 v ( - 3.5v for <10ns) to + 18 v (22 v for <10ns) v in, en, mode , v out ............... - 0.3v to + 18 v bst ................................ .... - 0.3v to v sw + 4. 5v all other pins ............................... - 0.3v to + 4. 5v continuous power dissipation (t a = + 25 c) (2) ................................ ................................ 4 w (5) junction temperature ............................... 150 c lead temperature ................................ .... 260 c storage temperature ................ - 65 c to +150 c recommended operating conditions ( 3 ) start - up input voltage ( v st ) ............. 2.7 v to 13v operation input voltage ( v in ) .......... 0. 8 v t o 13 v startup input voltage with vdd bias ( v st2 ) ......... ................................ ....................... 0. 9 v to 13v maximum external vdd bias voltage ..... 3.6v (4) boost output voltage ( v out ) ............... vin to 1 6 v operating junction temp . (t j ). .. - 40 c to +125 c thermal resistance ja jc qfn - 13 (3 m mx4mm) ev3431 - l - 00a (5) .................. 31 ........ 4 .... c/w jesd51 - 7 (6) ......................... 48 ....... 11 ... c/w notes : 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), t he junction - to - ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max) - t a )/ ja . exceeding the maximum allowab le power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outsi de of its operating conditions. 4) when the external vdd bias voltage is lower than the normal vdd regulated voltage, the external power prevent s the current from flowing out of vdd . 5) measured on ev3431 - l - 00a , 4 - layer 63mm x63mm pcb. 6) measured on jesd51 - 7, 4 - layer pcb.
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 4 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. electrical character istics vin = v en = 3.3v, t j = - 40c to 125c (7) , typical values are tested at t j = 25c, unless otherwise noted. parameter symbol condition min typ max units power supply start - up input voltage v st no vdd bias 2.7 13 v vdd = 3v 0. 9 13 v operating input voltage v in 0. 8 13 v operating vdd voltage ( 8 ) v dd vin = 2.7v, 0 - 1 0 ma 2.3 2.5 5 v v in = 12v, 0 - 15 ma 3. 4 v vdd uvlo rising ( 8 ) vdd uvlo - r vdd rising 2. 2 2.4 2. 6 v vdd uvlo falling vdd uvlo - f vdd falling 2 2.2 2.4 v shutdown current i sd v en = 0v, measured on vin 2 a quiescent current i q v fb = 1.1v, vin = 3v, vout = 9v, no switching, measured on vin 25 a v fb = 1.1v, vin = 3v, vout = 9v, no switching, measured on vout 450 550 a enable (en) control en turn - on threshold voltage v en - on v en rising (switching) 1. 2 3 v en high threshold voltage v en - h v en rising (micro power) 1.0 v en low threshold voltage v en - l v en falling (micro power) 0.4 v en turn - on hysteresis current i en - hys 1.0v < en < v en - on 3.5 5 6 .5 a en input current i en v en = 0v, 1.5 v 0 a en turn - on delay en on to switching 180 s frequency switching frequency f sw vin = 3.3v, v out = 9v 5 00 600 70 0 khz ls - fet minimum on time ( 9 ) t min - on 80 ns ls - fet maximum on time t max - on 7.5 s loop control fb reference voltage v ref t j = 25c 0 .99 1 1.01 v t j = - 40c to 125c 0 .985 1 1.015 v fb input current i fb v fb = 1.1v 50 na error amp voltage gain ( 10 ) a v - ea 300 v/v error amp tranconductance g ea 450 a/v error amp max. output current v fb = 0.8 v , v comp = 1v 6 3 a v fb = 1.2 v , v comp = 1v - 6 0 a comp to current g ain gcs 22 a/v comp psm threshold ( 9 ) v psm v mode = 0v 0.5 v comp high clamp v fb = 0.8 v 2. 6 v soft - start charge current i ss 6 7 .5 9 a mode selection psm mode tri - state region v mode - tri 0. 2 0.7 v usm mode tri - state region ( 1 1 ) 0.9 1.2 fccm mode tri - state region 1.6 vdd ultrasonic mode frequency f usm 23 33 khz hs - fet zcd psm , v fb = 1v, l = 1.5 h, v out = 9v - 2 00 0 3 00 ma hs - fet zcd ( 9 ) ( 1 2 ) v fb = 1.1v, usm and fccm - 2 a
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 5 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. electrical character istics (continued) vin = v en = 3.3v, t j = - 40c to 125c (7) , typical values are tested at t j = 25c, unless otherwise noted. parameter symbol condition min typ max units power switch low - side switch on resistance r on - l 6.5 m high - side synchronous switch on resistance r on - h 10 m low - side switch leakage current v sw = 16 v , t j = 2 5c 0.1 5 a high - side switch leakage current vout = 16 v, v sw = 0v , t j = 2 5c 0.1 5 a bst power bst voltage 3.3 v current limit switching current limit i pk - limt 1 9 21.5 23.5 a ilim current gain i ilim ilim current vs. input current 3.4 5 a /a ilim threshold voltage v ilim 0.98 v protection output ovp threshold 16.5 v output ovp hysteresis 0. 2 v thermal protection thermal shutdown ( 9 ) t sd 150 ? c thermal shutdown hysteresi s ( 9 ) t sd - hys 25 ? c notes : 7) guaranteed by over - temperature correlation , not tested in production . 8) vdd regulation voltage from 2.7v . vin is higher than the vdd uvlo rising threshold in each unit, which can guarantee that the ic start s up with 2.7v vin . 9) guaranteed by sample characterization , not tested in production . 10) guaranteed by design, not tested in production. 11) add an external vo ltage with in this range or float mode for usm . 12) the hs - fet zcd is lower than - 2a in usm and fccm .
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 6 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical characterist ics vin = v en = 3.3v, vout = 9v, l = 1.5h, t a = 25c, unless otherwise noted. note : 13) when vin is higher than 3.4v, vin suppl ies power to vdd, so the i q on vin rises to higher when vin > 3.4v. when vin is 3v, the higher voltage source of either vin or vout suppl ies vdd, so the i q on v out rises higher when vout > 3v and vin = 3v. 0 100 200 300 400 500 600 0 2 4 6 8 10 12 14 i q (in pin) (ua) input voltage(v) i q (vin pin) vs. input voltage v out = 9 v ( 1 3 ) 0 100 200 300 400 500 600 2 4 6 8 10 12 14 16 i q (out pin) (ua) output voltage (v) i q (vout pin) vs. output voltage v in = 3 v ( 1 3 ) 0 0.5 1 1.5 2 2.5 2 4 6 8 10 12 14 shutdown current(ua) input voltage(v) shutdown current vs. input votlage 0 2 4 6 8 10 12 14 16 0 50 100 150 200 250 input current limit(a) ilim resistor(k ) input current limit vs. ilim resistor v out = 9 v vin= 3 . 3 v vin= 6 . 6 v 10 10.5 11 11.5 12 12.5 13 13.5 14 2 3 4 5 6 7 8 9 input current limit(a) input voltage(v) input current limit vs. input voltage r ilim =22k vout=15v vout=9v 10 10.5 11 11.5 12 12.5 13 13.5 14 0 2 4 6 8 10 12 14 16 18 input current limit(a) output voltage(v) input current limit vs. output voltage r ilim =22k vin=3.3v vin=6.6v
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 7 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical characterist ics (continued) vin = v en = 3.3v, vout = 9v, l = 1.5h, t a = 25c, unless otherwise noted. 10 10.5 11 11.5 12 12.5 13 13.5 14 -50 0 50 100 150 input current limit(a) junction temperature( ) input current limit vs. junction temperature r ilim =22k 15 17 19 21 23 25 -50 0 50 100 150 switching current limit(a) junction temperature( ) switching current limit vs. junction temperature 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 -50 0 50 100 150 vdd uvlo(v) junction temperature( ) vdd uvlo vs. junction temperature rising falling 0.5 0.55 0.6 0.65 0.7 0.75 0.8 -50 0 50 100 150 vin rising threshold(v) junction temperature( ) vin rising threshold vs. junction temperature v dd bi a s=3.3v 1 1.05 1.1 1.15 1.2 1.25 1.3 -50 0 50 100 150 en threshold(v) junction temperature( ) en threshold vs. junction temperature ic startup switching 980 985 990 995 1000 1005 1010 -50 0 50 100 150 reference voltage(mv) junction temperature( ) reference voltage vs. junction temperature
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 8 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical characterist ics (continued) vin = v en = 3.3v, vout = 9v, l = 1.5h, t a = 25c, unless otherwise noted. 500 520 540 560 580 600 620 640 660 -50 0 50 100 150 switching frequency(khz) junction temperature( ) switching frequency vs. junction temperature
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 9 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performance characteristics vin = 3.3v, vout = 9v, l = 1.5h, i out = 3.5a , usm , t a = 25c, unless otherwise noted. 50 55 60 65 70 75 80 85 90 95 100 1 10 100 1000 efficienc y ( %) load current (ma) efficiency vs. load current psm vin=3v vin=3.3v vin=3.6v vin=4.2v 30 40 50 60 70 80 90 100 1 10 100 1000 10000 efficienc y ( %) load current (ma) efficiency vs. load current usm vin=3v vin=3.3v vin=3.6v vin=4.2v 30 40 50 60 70 80 90 100 1 10 100 1000 10000 efficiency(%) load current(ma) efficiency vs. load current usm, v out =5v vin=2.7v vin=3.3v vin=4.2v 30 40 50 60 70 80 90 100 1 10 100 1000 10000 efficiency(%) load current(ma) efficiency vs. load current usm, v out =12v vin=4.2v vin=6.6v vin=8.4v 70 75 80 85 90 95 100 1 10 100 1000 10000 efficiency(%) load current(ma) efficiency vs. load current psm, v out =15v vin=6v vin=6.6v vin=8.4v 30 40 50 60 70 80 90 100 1 10 100 1000 10000 efficiency(%) load current(ma) efficiency vs. load current usm, v out =15v vin=4.2v vin=6.6v vin=8.4v
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 10 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performance characte ristics (continued) vin = 3.3v, vout = 9v, l = 1.5h, i out = 3.5a , usm , t a = 25c, unless otherwise noted. -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 1 10 100 1000 regulation ( %) load current (ma) load regulation psm vin=3v vin=3.3v vin=3.6v vin=4.2v -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 1 10 100 1000 10000 regulation ( %) load current (ma) load regulation usm vin=3v vin=3.3v vin=3.6v vin=4.2v -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 1 10 100 1000 10000 regulation(%) load current(ma) load regulation psm, v out =15v vin=6v vin=6.6v vin=8.4v -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 2 3 4 5 6 7 8 9 regulation ( %) input voltage(v) line regulation psm iout=0a iout=1.75a iout=3.5a -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 2 3 4 5 6 7 8 9 regulation(%) input voltage(v) line regulation usm iout=0a iout=1.75a iout=3.5a -180 -120 -60 0 60 120 180 -60 -40 -20 0 20 40 60 1000 10000 100000 1000000 phase(deg) gain(db) frequency(hz) bode plot i out =3.5a gain phase
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 11 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performance characteristics (continued) vin = 3.3v, vout = 9v, l = 1.5h, i out = 3.5a , usm , t a = 25c, unless otherwise noted. 0 10 20 30 40 50 60 70 80 0 0.5 1 1.5 2 2.5 3 3.5 4 case temperature rising( ) load current(a) case temperature rising vin=3v vin=3.3v vin=3.6v vin=4.2v
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 12 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performance characteristics (continued) vin = 3.3v, vout = 9v, l = 1.5h, i out = 3.5a, usm , t a = 25c, unless otherwise noted. steady state i out = 0 a , usm steady state i out = 0a, psm ch1: v out /ac 10m v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 500m a /div. ch1: v out /ac 20m v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 2 a /div. 10 s/div. 4m s/div. steady state i out = 0a, fccm steady state i out = 3.5a ch1: v out /ac 10m v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 2 a /div. ch1: v out /ac 100m v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 10 a /div.. 1 s/div. 2 s/div. vin start - up i out = 0 a vin start - up i out = 3.5 a ch1: v out 5 v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 2 a /div. ch1: v out 5 v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 10 a /div. 4ms /div. 4m s/div.
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 13 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performance characteristics (continued) vin = 3.3v, vout = 9v, l = 1.5h, i out = 3.5a, usm , t a = 25c, unless otherwise noted. vin shutdown i out = 0 a vin shutdown i out = 3.5 a ch1: v out 5 v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 1 a /div. ch1: v out 5 v/div . ch2: v in 2v/div. ch3: v sw 5 v /div. ch4: i l 10 a /div. 1 s/div. 10m s/div. en start - up i out = 0 a en start - up i out = 3.5 a ch1: v out 5 v/div . ch2: v en 2v/div. ch3: v sw 5 v /div. ch4: i l 2 a /div. ch1: v out 5 v/div . ch2: v en 2v/div. ch3: v sw 5 v /div. ch4: i l 10 a /div. 2m s/div. 2m s/div. en shutdown i out = 0 a en shutdown i out = 3.5 a ch1: v out 5 v/div . ch2: v en 2v/div. ch3: v sw 5 v /div. ch4: i l 2 a /div. ch1: v out 5 v/div . ch2: v en 2v/div. ch3: v sw 5 v /div. ch4: i l 10 a /div. 1 s/div. 400 s/div.
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 14 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performance characteristics (continued) vin = 3.3v, vout = 9v, l = 1.5h, i out = 3.5a, usm , t a = 25c, unless otherwise noted. load transient i out = 0 - 1.75 a , i ramp = 25ma/ s, usm load transient i out = 3.5 - 1.75 a , i ramp = 25ma/ s ch1: v out /ac 500m v/div . ch4: i out 2 a /div. ch1: v out /ac 500m v/div . ch4: i out 2 a /div. 400 s/div. 400 s/div. load transient i out = 0 - 1.75 a , i ramp = 25ma/ s, psm load transient i out = 0 - 1.75 a , i ramp = 25ma/ s, fccm ch1: v out /ac 500m v/div . ch4: i load 2 a /div. ch1: v out /ac 500m v/div . ch4: i load 2 a /div. 40 0s/div. 400 s/div. over - current e ntry increase output current slowly over - current recovery decrease output current slowly ch1: v out 5 v/div . ch4: i out 5 a /div. ch2: i in 10a/div. ch3: v sw 5 v /div. ch1: v out 5 v/div . ch4: i out 5 a /div. ch2: i in 10a/div. ch3: v sw 5 v /div. 200 ms/div. 200 ms/div.
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 15 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. pin functions pin # name description 1 sw converter switch . sw is connected to the drain of the internal low - side power mosfet and the source of the internal high - side synchronous power mosfet. connect the power inductor to sw . 2 vdd internal bias supply. decouple vdd with a 4.7f ceramic capacitor placed as close to vdd as possible. when v in is higher than 3.4v, vdd is powered by v in . otherwise , vdd is powered by the higher voltage of either vin or vout . if the bias voltage connected to vdd is higher 3. 4 v, the regulator from vin and vout is disabled. the vdd regulator starts work ing when vin is higher than about 0. 9 v if en is high . supply vin with a power source higher than 2.7v during vin start - up to provide enough vdd power voltage. 3 ss soft - start programming . place a capacitor from ss to agnd to set the vout rising slew rate. 4 comp internal error amplifier output . connect a capacitor and resistor in series from comp to agnd for loop compensation. 5 fb feedback input. connect a resistor divider from vout to fb. 6 agnd analog ground. 7 pgnd power ground . 8 v out output . vout is connected to the drain of the high - side mosfet. v out powers vdd when vout is higher than vin and vin is lower than 3.4v . 9 ilim input current limit setting . a resistor in parallel with a capacitor is used to set the input current limit . place a 1 k resist o r in series with ilim to avoid noise injection . if the input current limit function is not used, connect ilim to agnd. 10 mode mode selection . if mode is floating, the MP3431 works in ultrasonic mode (usm). if m o de is high, the MP3431 works in forced continuous conduction mode ( fccm ) . if mode is low, the MP3431 works in pulse - skip mode ( psm ) . mode must always be higher than 0.2v in the application , e ven if in psm . place a 130k? + 20k? resistor divider from vdd to mode to set the MP3431 in psm . 11 en chip enable control . when not in use , connect en to vin for automatic start - up. en can program the v in uvlo. do not leave en floating. 12 vin input supply . vin must be bypassed locally. supply vin with power source higher than 2.7v during vin start - up to provide enough vdd power voltage. 13 bst bootstrap. a capacitor between bst and sw powers the synchronous hs - fet.
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 16 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. block diagram figure 1 : function al block diagram q 1 q 2 s w i l i m c o n t r o l l o g i c p g n d f b c o m p g m v o u t v i n e n v d d e n a b l e c i r c u i t r e g u l a t o r a n d u v l o b s t b s t c i r c u i t m o d e o f f t i m e s w v i n s s v o u t p w m c o m p a r a t o r c u r r e n t l i m i t v d d v r e f a g n d c 1 c 2 c 3 c 4 c 5 c 6 r 1 r 2 r 3 l 1 v o u t c u r r e n t s e n s e a m p l i f i e r v d d i n p u t c u r r e n t a m p l i f i e r 0 . 9 8 v r 4 r 5 c 7 b u f f e r
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 17 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. operatio n the MP3431 is a 600khz , fixed - frequency, high - efficiency, wide input range , boost converter. its fully integrated low r ds(on) mosfets provide small size and high efficiency for high - power step - up application s . constant - off - time (cot) control provides fast transient response, while mode selection provides flexible light - load performance design. boost operation the MP3431 uses cot control to regulate the output voltage. at the beginning of each cycle, the low - side n - channel mosfet ( ls - fet ) q1 is turned on, forcing the inductor current to rise. the current through the ls - fet is sensed . if the current signal rises above the comp voltage (v comp ), which is an amplifier output comparing the feedback voltage (v fb ) against the internal reference voltage , the pulse - width modulation ( pwm ) comparator flips and turns the ls - fet off . then the inductor current flows to the output capacitor through the high - side switch mosfet (hs - fet) , causing the inductor current to decrease . after a fi xed off time , the ls - fet turns on again and the cycle repeat s . in each cycle, the ls - fet off - time is determined by the vin/vo ut ratio, and the on time is controlled by v comp , so the inductor peak current is controlled by comp , which itself is controlled by the output voltage . therefore, the inductor current regulates the output voltage. operation mode the MP3431 works with a 600khz quasi - constant frequency with pwm control in heavy - load condition. when the load current decreases, the MP3431 can work in force d continuous conduction mode (fccm) , pulse - skip mode (psm) , or ultrasonic mode (usm) based on the mode setting. forced continuous conduction mode ( fccm ) the MP3431 works in a fix ed - frequency pwm mode for any load condition if mode is high ( > 1. 6 v ). in this condition, the off time is determined by the internal circuit to achieve the 600khz frequency based on the vin / vout ratio. when the load decrease s , the average input current drop s, and the inductor cu rrent from vout to vin may become negative during the off - time (ls - fet is off and hs - fet is on ) . this forces the inductor current to work in continuous conduction mode (fccm) with a fixed frequency, producing a low er vout ripple than in psm . pulse - skip mode (psm) the MP3431 works in psm in light - load condition if the mode voltage is low ( 0.2v < v m ode < 0. 7 v ) . in this condition, once the inductor current drops to 0a, the hs - fet turns off to stop current flow ing from vout to vin , forcing the inductor current to work in discontinuous conduction mode (dcm). at the same time, the internal off time becomes longer once the MP3431 enters dcm . the off time is inverse ly proportional to the hs - fet on period in each cycle . in deep dcm condition s , the MP3431 slows down the switching frequency and saves power loss. if v comp drops to the 0.5v psm threshold , the MP3431 stops switching to decrease the switching power loss further. switching resumes once v comp rises above 0.5v . the switching pulse skips based on v comp in very light - load condition s . psm has much higher efficiency than fccm in light load, but the vout ripple may be high er , and the frequency may go down and produce audible noise . it dcm , frequency is low , and the ls - f et will not turn on in the prolonged off time. i f the load increases and comp runs higher , the off time shortens and the MP3431 returns to the 600khz fixed - frequency regularly , so the loop can response to high load current. ultrasonic mode (usm) to prevent audible noise with a switching frequency lo wer than 20khz in psm , the MP3431 implements usm by floating mode or setting mode in the usm range ( 0.9v < v mode < 1.2v) . in usm , the inductor current works in dcm , and the frequency stretches as if in psm when the load decrease s to a moderate level . however, t he switching does not stop when comp drops to the 0.5v psm threshold. the ls - fet on time is controlled by comp , even if v comp is lower than the psm threshold , unless it triggers the min imum on time.
MP3431 C 21a, high - efficie ncy, sync, boost con verter w/ prog curre nt limit MP3431 rev. 1.0 www.monolithicpower.com 18 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. the MP3431 continues decreasing the switchin g f requency if the load is still decreasing. once the MP3431 detect s that the ls - fet i s off for 3 0 s, it force s the ls - fet on. this limit s the frequency , avoiding audible frequency in light - load or no - load condition . usm may convert more energy to the output than the required load due to the minimum 2 3 khz f requency, which causes vout to rise above the normal voltage setting . when vout rises and v comp drops, the inductor peak current may drop as well . if v comp drops below one internal clamped level , the hs - fet zero - current detection ( zcd ) threshold is regulated to one negative level gradually, so the energy in the inductor can flow back to v in in each cycle . this keep s the output at the setting voltage with a >2 3khz fr e quency . the MP3431 also works with a 600khz frequency if v comp rises again . usm has the same efficiency as in psm if the frequency is higher than the typical 33khz . usm has more power loss than psm if the frequency is clamped at the typical 33khz , but usm does not introduce audible noise caused by the group pulse in psm . minimum on time and minimum off time the MP3431 blanks the ls - fet on - state with 80 ns in each cycle to enhance noise immunity . this 80 ns minimum on time restrict s application s with a high vin/vout ratio. the MP3431 also blanks the l s - fet o ff state with a minimum off time in each cycle. during the minimum off time , the ls - fet can not turn on , and the minimum off time is short enough to convert the 0.8v input to a 16 v output. ls - fet and hs - fet maximum on time if the inductor current can not trigger v comp with an on time of 7.5 s, the MP3431 shut s down the ls - fet. after the ls - fet is shut down, the inductor current go es through the hs - fet and charges vout in the off time period . this help s re fresh vout with a minimum frequenc y of about 133 khz in heavy - l oad transient condition s . during ccm condition, the hs - fet on time is limited below 8 s . this help s limit the maximum ls - fet off time when vout is close to vin in usm. in usm or heavy - load psm , if vin is too close to vout , the hs - fet may be turn ed off by the 8s hs - fet maximum on time because the inductor current cannot ramp down within this 8 s limit. after the hs - fet turns off, the ls - fet turn s on immediately with one pulse control by v comp , and the hs - fet turn s on again. this makes the ls - fet work in a quasi - constant minimum duty cycle . if vin is high enough, vout is higher than the setting voltage with this duty cycle ratio. in psm and light load , the ic works with normal psm logic . the ic stops working when vout is higher than the setting voltage and resume s switching when vout drop s belo w the setting voltage. vdd power the MP3431 internal circuit is powered by vdd. a ceramic capacitor no less than 4.7 f is required on vdd. when vin is lower than 3.4v, vdd is powered from the higher value of either vin or vout. this allows the MP3431 to maintain a low r ds(on) and high efficiency , even with a low input voltage. when vin is higher than 3.4v, vdd is always powered by vin. this decrease s the vout to vdd regulator los s because vout is always higher than vin. if vdd is powered by an external supply and the voltage is higher than 3.4v , the regulators from v in and v out are disabled. in this condition, the MP3431 starts once the external vdd power supply is higher tha n vdd uvlo , even if vin is as low as 0. 9v . when vdd is powered by the external power supply, the MP3431 continues working , even if both v in and vout are dropping but are higher than 0. 8v . the external vdd power source shoul d be limited within 3. 6 v. there is a reverse - blocking circuit to limit t he current flowing between vin and vout . if the external vdd power is higher than the vdd regulation voltage, the current is suppl ied from the external power , and there is no path for the current from vd d to v in or from vdd to vout . vdd is charged when vin is higher than about 0. 9v and en is higher than the micro - power threshold . if en is low, vdd is disconnect ed from vin and vout. supply vin with a power source higher than 2.7v during vin start - up to provide enough vdd power voltage .
MP3431 C 21a, high - efficie ncy, sync, boost con verter w/ prog curre nt limit MP3431 rev. 1.0 www.monolithicpower.com 19 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. start - up when the MP3431 input is powered, it start s c harging vdd from vin . once vdd rises above its uvlo threshold and en is high , the MP3431 starts sw itch ing with close d loop control. if vdd is powered by an additional supply, the MP3431 start switching once vdd rises to above its under - voltage lockout ( uvlo ) threshold . after the ic is enabled , the MP3431 starts up with a soft - start (ss) control. the ss si gnal is controlled by charging ss from 0v and compared with the internal reference voltage . the lower value is fe d to the error amplifier to control the output voltage . after the ss signal rises above the reference voltage, soft start is complete d, and the internal reference take s charge of the feedback loop regulation. if th ere is some bias voltage on vout during psm, the MP3431 stops switching un til the ss signal rises above v fb , which is proportional to the vout bias voltage. if ic is in usm or fccm, the MP3431 works with a frequency of about 33khz or 600khz . both usm and fccm have a negative inductor current , so the energy may transfer from vout to vin if the vout bias is high. synchronous rectifier and bst function the MP3431 integrates both an ls - fet q1 and hs - fet q2 to reduce external components. during switching, the rectifier switch q2 is powered from bst (typically 3. 4 v highe r than the sw voltage) . this 3. 4 v bootstrap voltage is charged from vdd when the ls - fet turns on. current limit the mp34 31 provides both a fixed cycle - by - cycle switching peak current limit and programmable average in put current limit function . switching peak current limit the MP3431 provides a fixed cycle - by - cycle switching peak current limit . in each cycle, the internal current sensing circuit monitors the ls - fet current signal . once the sensed current reaches the typical 21.5a current limit, the ls - fet q1 turns off . the ls - fet current signal is blanked for about 80ns internally to enhance noise immunity . in put current limit the mp34 31 senses the ls - fet q1 average current when q1 turns on and converts it to a micro - amp current signal that is fed to ilim . simultaneously , a resistor on i lim convert s this current signal to a voltage signal that is f ed to the negative input of the current - limit error amplifier. the current - limit amplifier output clamps v comp if the in put current signal is higher than the current limit threshold. as a r esult , the input current is lim ited by the internal comp signal , and the output voltage d ecreases (see figure 2 ) . figure 2 : in put over load protection r ilim is the input current setting resist o r, c ilim is used for current limit signal filter ing , and r d_noise is used to avoid noise affection . r d_noise , r ilim , and c ilim are needed for input current limit setting . t hen t he input current limit can be estimated with equation (1) : ( 1 ) w here i in_lim is the input current limit, r ilim is the input current limit setting resist o r ( in k ) , and (1.2 - v in * 0.12) is the offset current and sense delay of the inner amplifier. typically , use 1 k for r d_noise . i f the input current limit function is not used, connect ilim to agnd . l s - f e t c u r r e n t 3 . 4 5 a / a i l i m i n t e r n a l c o m p 0 . 9 8 v c u r r e n t l i m i t e r r o r a m p l i f i e r 1 k r i l i m r d _ n o i s e c i l i m ? ? ? ? ?? in _ lim in ilim 980 i (1.2 v 0.12) 3.45 (r 1)
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 20 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. enable (en) and programmable uvlo en enables and disables the MP3431 . when applying a voltage higher t han the en high threshold (1v max threshold ), the MP3431 starts up some of the internal circuits (micro - power mode). if the en voltage exceeds the turn - on threshold (1. 23v ), the MP3431 enables all functions and starts boost operation. boost switching is disabled when the en voltage falls below its turn - on thres hold (1. 23v ). to completely shut down the MP3431 , a <0.4v low - level voltage is required on en . after shutdown, the MP3431 sinks a current from the input power (less than 2 a , typically). en is compatible with voltage s up to 13 v . for automatic start - up, connect en to vin directly. the MP3431 features a programmable uvlo hysteresis. when powering up in micro - power mode , en sinks a 5a current from an upper resistor ( r top ) (see figure 3 ). figure 3 : vin vulo program v in must increase to overcome the current sink. the v in start - up threshold is determined by equation (2) : ( 2 ) where v en - on is the en voltage turn - on threshold (1. 23v , typically). once the en voltage reaches v en - on , the 5 a sink current turns off to create a reverse hysteresis for the vin falling threshold , which can be calculated with equation (3) : ( 3 ) over - voltage protection (ovp) if over - voltage is detected from v out with a 16.5 v threshold ( typically ) , the MP3431 stops switching immediately until the voltage drops to 16. 3 v . this prevents over - voltage on the output and internal power mosfets . thermal protection thermal shutdown prevents the ic from operating at exceedingly high temperatures. when the die temperature exceeds 150 c , the ic shut s downs and resumes normal operation when the die temperature drops to 25 c . m p 3 4 3 1 v i n r t o p e n r b o t 5 a top in on en on top bot r v v (1 ) 5 a r r ?? ? ? ? ? ? ? in uvlo hys top v 5 a r ?? ? ? ?
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 21 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. application informat ion setting the output voltage the external resistor divider is used to set the output volta ge. t ypically , cho o se r1 to be between 3 00 - 8 00 k . then calculate r2 with equation (4) : ( 4 ) where v ref is 1v , r1 is the top feedback resistor , and r2 is the bottom feedback resistor. selecting the input capacitor the input capacitor (c1) is used to maintain the dc input voltage. low esr ceramic capacitors are recommended. the input voltage ripple can be estimated with equation (5) : ( 5 ) where f s is the switching frequency , and l is the inductor value. selecting the output capacitor the output current of the boost converter is discontinuous and therefore requires an output capacitor (c2) to supply ac current to the load. for the best performance, low esr ceramic capacitors are recommended. the output voltage ripple can be estimated with equation (6) : ( 6 ) where r l is the value of the load resistor. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. selecting the inductor an inductor is required to transfer the energy between the input source and the output capacitors. an inductor with a larger value results in less ripple current and a lower peak inductor current, reducing stress on the power m osfet. however, the larger value inductor has a larger physical size, a higher series resistance, and a lower saturation current. for most designs, the inductance value can be calculated with equation (7) : ( 7 ) where ?i l is the inductor ripple current. choose the inductor ripple current to be approximately 2 0 ~ 50% of the maximum inductor peak current. typically, a 1.5 h inductor is recommended. ensure that the inductor does not saturate under the worst - case condition . the inductor should have a low series resistance (dcr) to reduce the resistive power loss. soft - start (ss) capacitor selection with the required output voltage rising time (t rise ) , the value of c ss can be calculated using equation ( 8 ) : ( 8 ) where i ss is the ss charging current ( 7 .5 a ) . typically , set c ss to be 22nf for about 3 ms of the rising time. input current limit setting the ilim resist or ( r5 ) is used to set the input current limit . one 1 k resist o r in series conne cted to ilim prevents noise injection. calculate r5 with equation (9) : ( 9 ) for example, if the required current limit is 13a , and vin is 3 .3v, then r5 is calculated to be 22. 29 k , so chose a 22 k value for a 13a input current limit. place a 4.7 ~ 10nf decoupl ing capacitor parallel with r5. i f the input current limit function is not used, connect ilim to agnd . v dd capacitor selection the MP3431 integrates the v dd power at about 3. 4 v, which power s the internal mosfet gate driver and internal control circuit, typically. one ceramic bypass capacitor 4.7 f or higher is necessary for the internal regulator. do not connect the external load to the vdd power. 1 2 r v v v r ref out ref ? ? ? ref ss rise ss v i t c ? ? ?? ?? ? ? ? ? ?? in _ lim in 980 r5 1 3.45 i (1.2 v 0.12) in in in 2 s out vv v1 8f l c1 v ?? ? ? ? ? ?? ?? ?? out in out s l out v v v1 f r c2 v ?? ? ? ? ? ?? ?? ?? in out in s out l v (v v ) l f v i ? ? ? ? ?
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 22 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. bst capacitor the MP3431 uses one bootstrap circuit to power the output n - channel mosfet . one external bootstrap capacitor is necessary for the charge pump power. a 0. 1 f ceramic capacitor between bst and sw is recommended . program mable uvlo the MP3431 features a programmable uvlo hysteresis. when powering up, en sinks a 5a current from an upper resistor ( r top ) (see figure 3 ). vin must increase to overcome th e c urrent sink. determine the vin start - up threshold with equation (1 0) : ( 10 ) where v en - on is the en voltage turn - on threshold ( typically 1. 2 3v ). once the en voltage reaches v en - on , the 5 a sink current turns off to create a reverse hysteresis for the vin falling threshold , which can be calculated with equation (11) : ( 11 ) f or automatic start - up, connect en with a 30 k r top resist o r to operate with 150mv hysteresis. m ode selection the MP3431 can work in force d continuous conduction mode (fccm), pulse - skip mode (psm) , or ultrasonic mode (usm) based on the mode setting. pull m ode to vdd directly for fccm ; float mode for usm ; pull the mode voltage to 0.2 - 0.7v to make the MP3431 work in psm . with no appropriate voltage for the psm threshold, a resist o r divider from vdd to gnd can be used ( see figure 4) . figure 4 : mode setting the typical vdd voltage range is 2 v to 3.3v. set r up to 130 k and r down to 20 k to achieve a 267 - 450mv voltage on mode . when mode is pulled below 1v, a current less than 2 a flows out of mode . a 20k r bot cause s a 4 0mv mode voltage increase. the ideal mode voltage is about 307 - 490mv. compensation the output of the transconductance error amplifier (comp) is used to compensate for the regulation control system. the system uses two poles and one zero to stabilize the control loop. the pole f p1 set by the output capacitor ( c out ) and the load resistance . pole f p2 starts from the origin. the zero f z1 is set by the compensation capacitor ( c comp ) and the compensation resistor ( r comp ) . these are determined by equation (12) and equation (13) : (1 2 ) (1 3 ) where r load is the load resistance. there is a right - half - plane zero (f rhpz ) that exists in fccm , where the inductor current does not drop to zero in each cycle . the frequency of the right - half - plane zero can be determined with equation (14) : (1 4 ) the right - half - plane zero increases the gain and reduces the phase simultaneously, which results in a smaller phase margin and gain margin. the worst - case happens at the condition of the minimum input voltage and maximum output power. top in on en on top bot r v v (1 ) 5 a r r ?? ? ? ? ? ? ? in uvlo hys top v 5 a r ?? ? ? ? m p 3 4 3 1 v d d r u p m o d e r d o w n ? ? ? ? ? p1 load out 1 f (hz) 2 r c ? ? ? ? ? z1 comp comp 1 f (hz) 2 r c ?? ? ? ? 2 load in rhpz out r v f ( ) (hz) 2 l v
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 23 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. pcb layout guidelines efficient pcb layout is critical for high - frequency switching power supplies. a poor layout can result in reduced performance, excessive emi, resistive loss, and system instability. use a 4 - layer pcb for high - power application s . for best results, refer to figure 5 and follow the guidelines below. 1. place the output capacitor (c2a ~ c2c) as close to v out and pgnd as possible . 2. place a 0.1 f capacitor cl ose to the ic (c2d) to reduce the pcb parasitical inductance . 3. keep the connection of vout and pgnd to the output capacitor short and wide with copper . 4. place this copper , the ic , and c out on the same layer. 5. place the fb divider r1 and r2 as close to fb as possible. 6. keep the fb trace far away from noise sources , such as the sw node . 7. place the current limit setting net (r4, r5 , and c7) close to ilim . 8. connect the ilim ground to agnd. 9. connect the compensation components and ss capacitor to agnd with a short loop . 10. connect the vdd capacitor to pgnd with a short loop. 11. keep the input loop (c1, l1, sw , and pgnd ) as small as possible. 12. places enough gnd vias close to the MP3431 for good thermal dissipation. 13. use separated agnd and pgnd layout s connect ed between the agnd and pgnd pins under the package. figure 5 : layout recommendation design example table 1 is a design example following the application guidelines for the specifications below . table 1: design example v in 3 - 8.4v i in_lim 13a v out 9v i out 3.5a the detailed application schematic is shown in fig ure 6 and figure 7 . the typical performance and circuit waveforms are shown in the typical performance characteristics section. for more device applications, please refer to related evaluation board datasheet. l 1 c 1 c c 1 b c 1 a c 6 c 4 r 3 r 2 r 1 c 3 c 2 a c 2 b c 2 c c 2 d c 5 r 8 r 6 r 4 r 7 r 5 r 9 c 7 v o u t g n d v i n v i a t o p l a y e r b o t t o m l a y e r j 1
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it MP3431 rev. 1. 0 www.monolithicpower.com 24 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical application circuits figure 6 : typical application circuit with 13a input current limit , v in = 3 - 8.4v, v out = 9v, i out = 3 .5 a figure 7 : typical application circuit with 13a inp ut current limit , v in = 6 - 8.4v, v out = 15v, p out = 50w v i n v o u t 2 2 f c 1 a 2 2 n f c 4 0 . 1 f c 5 4 . 7 f c 3 7 5 0 k r 1 9 3 . 1 k r 2 6 . 8 k r 3 6 . 8 n f c 6 2 2 f c 2 a 3 0 k r 8 n s r 9 2 2 f c 1 b 2 2 f c 1 c 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f c 2 d 3 ~ 8 . 4 v 9 v @ 3 . 5 a m p 3 4 3 1 v d d 2 s s 3 c o m p 4 f b 5 a g n d 6 p g n d 7 v o u t 8 i l i m 9 m o d e 1 0 e n 1 1 v i n 1 2 b s t 1 3 s w 1 u 1 1 . 5 h l 1 1 2 3 j 1 2 0 k r 7 1 3 0 k r 6 4 . 7 n f c 7 2 2 k r 5 1 k r 4 v i n v o u t 2 2 f c 1 a 2 2 n f c 4 0 . 1 f c 5 4 . 7 f c 3 7 5 0 k r 1 5 3 . 6 k r 2 1 0 k r 3 6 . 8 n f c 6 2 2 f c 2 a 3 0 k r 8 n s r 9 2 2 f c 1 b 2 2 f c 1 c 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f c 2 d 6 ~ 8 . 4 v 1 5 v @ 5 0 w m p 3 4 3 1 v d d 2 s s 3 c o m p 4 f b 5 a g n d 6 p g n d 7 v o u t 8 i l i m 9 m o d e 1 0 e n 1 1 v i n 1 2 b s t 1 3 s w 1 u 1 1 . 5 h l 1 1 2 3 j 1 2 0 k r 7 1 3 0 k r 6 4 . 7 n f c 7 2 1 . 5 k r 5 1 k r 4
MP3431 C 21a , high - efficiency , sync , boost converter w/ prog current lim it notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not as sume any legal responsibility for any said applications. MP3431 rev. 1 .0 www.monolithicpower.com 25 6/8/2017 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. package information qfn - 13 (3mmx4mm) s i d e v i e w b o t t o m v i e w n o t e : 1 ) l a n d p a t t e r n s o f p i n 1 , 7 a n d 8 h a v e t h e s a m e l e n g t h a n d w i d t h . 2 ) a l l d i m e n s i o n s a r e i n m i l l i m e t e r s . 3 ) l e a d c o p l a n a r i t y s h a l l b e 0 . 1 0 m i l l i m e t e r s m a x . 4 ) j e d e c r e f e r e n c e i s m o - 2 2 0 . 5 ) d r a w i n g i s n o t t o s c a l e . t o p v i e w r e c o m m e n d e d l a n d p a t t e r n p i n 1 i d m a r k i n g p i n 1 i d i n d e x a r e a

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